Object-Oriented White Papers
Java Debug Hardware Models Using JBits
Overview This paper presents a methodology for extending FPGA bitstream-level debug and simulation capabilities, through the inclusion of Java/JBits-based hardware device models. Using the JBits API, behavioral hardware models can be written in Java and used in simulations with the Virtex Device Simulator. Java lends the advantages typically associated with object-oriented design languages to FPGA bitstream-level debugging and simulation. This leads to more efficient design of hardware models as well as more flexibility in testing. Java also provides unique capabilities that assist interaction with the Java Debug Hardware Models (JDHM) during simulation. Also, the advantages of bitstream level design control and run-time reconfiguration capabilities provided by JBits offers benefits over traditional simulation techniques.
| Publisher | Virginia Polytechnic Institute and State University | File Format | |
|---|---|---|---|
| Date Published | January 2008 | ||
| Format | White Papers | ||
| Topics | |||
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