Scalability White Papers
Chip Multi-Processor Scalability for Single-Threaded Applications
Overview The exponential increase in uniprocessor performance has begun to slow. Designers have been unable to scale performance while managing thermal, power, and electrical effects. Furthermore, design complexity limits the size of monolithic processors that can be designed while keeping costs reasonable. Industry has responded by moving toward Chip Multi-Processor architectures (CMP). These architectures are composed from replicated processors utilizing the die area afforded by newer design processes. While this approach mitigates the issues with design complexity, power, and electrical effects, it does nothing to directly improve the performance of contemporary or future single-threaded applications. This paper examines the scalability potential for exploiting the parallelism in single-threaded applications on these CMP platforms.
| Publisher | Princeton University | File Format | |
|---|---|---|---|
| Date Published | October 2005 | ||
| Format | White Papers | ||
| Topics | |||
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