Load Balancing White Papers
Performance, Area and Bandwidth Implications on Large-Scale CMP Cache Design
Overview Large-scale CMP (LCMP) platforms that consist of 10s of cores for throughput computing will soon become reality. The performance and scalability of these architectures is highly dependent on the design of the cache hierarchy. The goal of this paper is to explore the cache design space for LCMP platforms. This exploration problem is approached by developing a constraint-aware analysis methodology (CAAM). CAAM first considers two important constraints and limitations that the LCMP cache design needs to account for - area constraints and on-die / off-die bandwidth limitations. Based on the approximate area constraints, a viable range of cache hierarchy options is determined. The bandwidth requirements are then estimated for these cache hierarchy options by running server workload traces on the LCMP performance model.
| Publisher | Intel | File Format | |
|---|---|---|---|
| Date Published | January 2007 | ||
| Format | White Papers | ||
| Topics | |||
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