Bandwidth Issues White Papers
Bandwidth Reduction for Video Processing in Consumer Systems
Overview The architecture of present video processing units in consumer systems is usually based on various forms of processor hardware, communicating with an o -chip SDRAM memory. Examples of these systems are currently available MPEG encoders and decoders, and high-end television systems. Due to the fast increase of required computational power of consumer systems, the data communication to and from the o -chip memory has become the bottleneck in the overall system performance (memory wall problem). This paper presents a strategy for mapping pixels into the memory for video applications such as MPEG processing, thereby minimizing the transfer overhead between memory and the processing.
| Publisher | Technical University of Eindhoven | File Format | |
|---|---|---|---|
| Date Published | November 2001 | ||
| Format | White Papers | ||
| Topics | |||
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