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Automated Incremental Design of Flexible Intrusion Detection Systems on FPGAs

Tags:
network security

Overview Intrusion detection for network security is a compute intensive application demanding high system performance. This paper presents a variety of strategies developed for the automatic synthesis of highly efficient intrusion detection systems. FPGA architectures are created using a high-level, graph-based partitioning methodology. This paper provides a library of performance customized architectures, which, through more efficient communication and extensive reuse of hardware components, provide dramatic increases in area-time performance. The paper addresses a problem of earlier designs, the requirement for complete place-and-route for small changes to the pattern database, through an optimized incremental design strategy.

Further White Paper Details
Publisher	University of Southern California	File Format	PDF
Date Published	May 2004
Format	White Papers
Topics	Network Security, Security Tools, Intrusion Detection Systems

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