Semiconductor Tech. - Manufacturing White Papers
Extended 90 nm CMOS Technology With High Manufacturability for High-Performance, Low-Power, RF/Analog Applications
Overview High-density, 90 nm CMOS technology has been suggested for generic, low-voltage, high-performance applications. This paper, describes some strategies for extending the previous technology in order to fabricate the following: A low-standby-power transistor with high drivability for low-power applications, a high-drivability transistor, inductor, and MIM capacitor for RF/analog applications, up to 10 layers of high-reliability, dual damascene Cu/very-low-k (VLK) and Al interconnects. The low-standby-power, 90 nm transistor consumes only 10% of the standby power consumed by 130 nm transistors, and this is achieved with no degradation of circuit speed. Using 90 nm technology, the paper has fabricated up to 10 layers of interconnects and a 1.07 µm 2 SRAM cell without additional process steps such as local interconnects and shared contacts.
| Publisher | Fujitsu | File Format | |
|---|---|---|---|
| Date Published | June 2003 | ||
| Format | White Papers | ||
| Topics | |||
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