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Algorithm/Architecture Co-Exploration for Designing Energy Efficient Wireless Channel Estimator
Overview A Wireless Sensor Network (WSN) is comprised of motes which are resource constraint devices. Motes are battery operated and must conserve as much power as possible. Power usage for each mote is made up of processing data, sensing the surroundings, and sending and receiving packets. This paper proposes a solution to reduce the consumption of power using FPGA hardware specially programmed to do low power compression. A mote would offload bulk data to a hardware attachment and receive the compressed version of the data. The compressed data can be stored in flash or sent over the network to the sink node.
| Publisher | University of California | File Format | |
|---|---|---|---|
| Date Published | April 2007 | ||
| Format | White Papers | ||
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