Network Interface Cards White Papers

Next Generation PHY Interface for PCI Express (PIPE2)

Overview This presentation is intended for PCI Express PHY and IP developers. The presentation provides an overview of PIPE 2.0 architecture and design goals and details of PIPE 2.0 rate selection (PCLK or datapath). It presents timing diagrams and examples of rate change for various link states. The presentation proposes PIPE 2.0 prototyping connector.

Further White Paper Details
PublisherIntel File FormatPDF
Date PublishedMarch 2006 Downloads305
FormatPresentations   
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