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A Low-Power DS-CDMA RAKE Receiver Utilizing Resource Allocation Techniques

Overview This paper presents architectural and implementation innovations made to realize a self-contained front-end processor for any DS-CDMA-based system. At the heart of the ASIC is a highly flexible RAKE processing engine that utilizes a unique resource allocation technique for maximum flexibility. The front-end of the chip consists of a matched filter and an all digital timing and frequency recovery loop based on novel interpolation and direct digital frequency synthesis (DDFS) techniques.

Further White Paper Details
Publisher	Institute of Electrical and Electronics Engineers	File Format	PDF
Date Published	August 2004	Downloads	33
Format	White Papers
Topics	TDMA - CDMA, Resources Mgmt.

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