Memory Components White Papers
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
Overview This paper describes a Parallel Vector Access unit PVA), the vector memory subsystem that efficiently "gathers" sparse, strided data structures in parallel on a multibank SDRAM memory. We have validated our PVA design via gate-level simulation, and have evaluated its performance via functional simulation and formal analysis. On unit-stride vectors, PVA performance equals or exceeds that of an SDRAM system optimized for cache line fills. On vectors with larger strides, the PVA is up to 32.8 times faster.
| Publisher | The University of Utah | File Format | PDF, requires Acrobat Rdr 5 |
|---|---|---|---|
| Date Published | November 2000 | Downloads | 8 |
| Format | White Papers | ||
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