Embedded Microprocessors White Papers
Data-Converter Challenges in SoC Design
Overview As gate lengths shrink to deep-submicron dimensions, the promise of SoCs is becoming a reality. The building blocks of a generation of ICs are now major circuit elements, many of which would have been impressive stand-alone ICs a few years ago. Included on these new chips are such analog blocks as high-speed and high-resolution ADCs and DACs, PLLs, crystal oscillators, and active filters. Along with these analog circuits, deep-submicron CMOS technology allows the inclusion of major digital blocks, including digital processors, digital filters, RAMs, ROMs, and multimillion-gate blocks of random logic. Mixed-mode SOC (system-on-chip) designs cover a wide spectrum of applications, including areas as diverse as television, datacomm, fingerprint sensors, electronic games, electronic supermarket-shelf tags, and many others. The high-performance ADCs and DACs in these SOC designs present chip architects with unique challenges that they must overcome to achieve a short time to market.
| Publisher | Cadence | File Format | PDF, requires Acrobat Rdr 5 |
|---|---|---|---|
| Date Published | December 2001 | Downloads | 77 |
| Format | White Papers | ||
| Topics | |||
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