Interfaces / Buses / I/Os White Papers
CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip
Overview The design of highly complex systems on single chips has been the new challenge faced by the design community for some years. Driven in one hand by the technological need for high-speed and large bandwidth applications and in the other hand by the commercial pressure for short time-to-market, the demand for systems-on-a-chip (SoCs) can be met thanks to the spectacular progresses in chip integration capacities, together with the availability of existing, highly specialized, hardware and software cores. These libraries of IP cores, either available in-house or commercialized on the market, are reused by embedding them into a single system chip, conceptually in the same way as integrated circuits were connected on PCBs. This paper describes CAS-BUS, a P1500 compatible Test Access Mechanism for Systems on a Chip.
| Publisher | Special Interest Group on Design Automation (SIGDA) | File Format | PDF, requires Acrobat Rdr 5 |
|---|---|---|---|
| Date Published | August 2003 | ||
| Format | White Papers | ||
| Topics | |||
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