Network Interface Cards White Papers

A Design Style to Simplify IP Integration and Verification

Overview The paper presents Rapid Silicon Prototyping, a new design style for designing very large integrated circuits. The problems facing chip designers are described; these include the design productivity gap, the requirement of rigid conformance to ambiguous specifications, and the compounded risk from using multiple IP blocks. A deconfigurable and externally extendable system can be used as the basis of a customer end product. Modular IP building blocks attached to standardized buses can be verified before the chip is manufactured. The reusable IP delivery tool HDLi is described. IP can be added vie FPGA, logic emulator, or integrated circuits. Using Rapid Silicon Prototyping the hardware and software can be designed simultaneously. Components of the Rapid Silicon Prototyping system are described.

Further White Paper Details
PublisherRoyal Philips Electronics File FormatPDF, requires Acrobat Rdr 5
Date PublishedAugust 2003 Downloads13
FormatWhite Papers   
Topics

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