Cellular Equipment White Papers
Low Power Programmable DSP Chips: Features and System Design Strategies
Overview Programmable DSP chips are increasingly being used in portable products such as pagers, cordless and digital cellular telephones, personal audio equipment, and laptop computers. Because these applications are battery powered and the DSP's power consumption may comprise the lion's share of total system power consumption, there is great interest in reducing DSP power consumption. Techniques for accomplishing this include low voltage DSPs (3.3 or 3.0 volt supply instead of 5.0 volts), use of sleep or idle modes, dynamic control of the processor clock frequency, disabling unused peripherals, and disabling unused output pins. System-design techniques include minimizing external accesses, minimizing logic state transitions, and using application-specific coprocessors to off-load tasks from the DSP to a processor better suited to the task at hand. Because a processor's energy consumption can vary widely depending on the instructions it executes, power benchmark results based on measuring a processor's power consumption under carefully controlled conditions as it executes different instructions can help the designer create lower power systems.
| Publisher | Berkeley Design Technology, Inc. (BDTI) | File Format | HTML |
|---|---|---|---|
| Date Published | August 2003 | Downloads | 27 |
| Format | White Papers | ||
| Topics | |||
-
Did you find this white paper useful?
White Paper RSS
Download
Register
